FPGA implementation of 8k points FFT/IFFT for a 5G channel emulator (P-0365) (MFN 8534)

Abstract

Channel emulator is an instrument for emulating the channel environment faced by transmitted waveforms. In a test environment, channel emulators replicate the channel between a transmitter and a receiver and provide a transmitted waveform affected through channel effects to the receiver input. FFT and IFFT blocks are major components of a channel emulator. Fast Fourier Transform (FFT) is a proficient calculation used to process Discrete Fourier Transform (DFT). When deciding among alternate implementation methods, the algorithm chosen should be considering the execution speed, utilization rate of the placed hardware and hardware complexity of the system. For real time systems, execution speed is the major concern. Objective of this project is to design a hardware for computation of 8K (8192) points FFT/IFFT with a throughput of 34 Mega samples per second. Since Cooley Turkey algorithm breaks the DFTs, so it can be combined with any other DFT algorithm hence implying stages of multiple techniques in a row to achieve the results. We have designed Mix-Radix Butterfly architecture which uses stages of Radix 2 and Radix 4 simultaneously to achieve high speed.