Digital Image Processing with FPGA Implementation (P-0486) (MFN 1826)

Abstract

"Digital Image Processing with FPGA Implementation" deals with the real time implementation of image processing algorithms on FPGA hardware. Different filters have been implemented in Verilog and they have been programmed onto FPGA. These filters are Median, Sharpen, Edge detection and Emboss as well. GUI of DIPFI allows the user to browse an input image (320X240). The filter program is then, downloaded onto FPGA via running Xilinx Project Navigator. The resultant image is displayed on GUI. The resultant image will be a filtered image. It appears in three layers i.e. Blue, Green, and Red respectively. The system is running on a 16MHz system clocks.The implemented filters are Median, Edge detection, Sharpen, and emboss respectively. The median filter algorithm uses the concept of pipelining. It involves 13 compare and sort operations to calculate median. It is useful in removing shot noise. Two algorithms for edge detection have been designed 3x3 and 5x5 respectively. Edge detection 5x5 produces better result than that of edge detection 3x3. Sharpen algorithm involves edge detection technique in addition with input image to make it look sharper. Lastly implemented Emboss filter gives a better result to have the 3D shadow effect of an input image. The overall project is implementation of filters that have been programmed on to FPGA.