Loop Unrolling Serial Assembly Optimizer for a VLIW Processor

Abstract

We present a Serial Assemble Optimizer (SOA) for the Media Engine {ME-2), being developed in Communications Enabling Technology (CET). The SOA works in collaboration with the already coded module that takes the C code and converts it into the serial assembly, referred hereon as Front-end Serial Assembly Generator (FSAG). CET has only implemented a minimal functionality prototype of FSAG, whereas in actuality the GNU C compiler is being used as the serial code generator on the backend. Our project scope is the Serial Assembly Optimizer (SAO), which takes the serial code generated by the FSAG and makes use of advanced optimization techniques to generate a parallel, and optimized code.