Design and Implementation of RISC-V Processor with ML Accelerator

Abstract

We are currently witnessing the dawn of a new industrial revolution, characterized by the rapidly changing industrial landscape. In this revolution, RISC-V has emerged as a widely used term to describe the development of custom processors designed to meet the power and performance requirements of newer workloads for AI, ML, and IoT. RISC-V is an open standard ISA that is built on RISC principles and plays a critical role in linking software and hardware layers of computer abstraction. The primary drivers of this product include building custom processors, boosting speed, reducing costs, enhancing security, developing a platform for new students in this field, promoting innovation and skills, and competing with other Companies such as Intel (x86), ARM (ARM ISA), and others. This project presents the implementation of a RISC-V processor on FPGA with an integrated accelerator for machine learning (ML) applications. The processor used in this project is VexRiscv with ztachip accelerator. The main objective of this project is to develop a hardware system with high performance and efficiency for ML applications. To achieve this objective, the VexRiscv processor is modified to transfer tensor instructions to ztachip for accelerating ML computations. The implementation of this integrated system is carried out on an FPGA platform, which allows for flexibility and easy reconfiguration. The design is verified using debugging tools and is tested on various ML applications. The results show that the designed processor with the integrated accelerator outperforms traditional processors and accelerators in terms of both speed and energy efficiency. The tensor instructions of ztachip for ML computations also provide significant speedup compared to standard RISC-V instructions. Overall, the project demonstrates the feasibility and effectiveness of implementing a RISC-V processor with an integrated accelerator for ML applications. This work has implications for the development of high-performance and energy-efficient RISC-V accelerators for various applications, particularly in the field of ML.