Abstract:
This project is about the design and implementation of a real time 16-Bit microprocessor called Machine Architecture that is Really Intuitive and Easy (MARIE). MARIE is a Reduced Instruction Set computing (RISC) machine. The design of the processor includes datapath and control Finite State Machine (FSM). The processor is implemented onto a Xilinx Spartan 3 device. Target constraints are reduced area and high speed. Seven Segment Displays (SSDs) are used to show the values of internal registers with a push of a button. The entire design is done using Verilog HDL with Xilinx ISE tool used for synthesis and ModelSim is used for simulation. Then the physical implementation is done on Field Programmable Gate Array (FPGA). Thus, they are able to implement far more complex designs.
The Implementation includes ALU (Arithmetic Logic Unit), Main Memory, Registers and Control Unit in Verilog and in particular Von Neumann architecture elements onto the FPGAs. In the implementation of memory, dedicated resources are used in particular Block RAMS (BRAM). Total number of five registers which include PC, MAR, IR, AC, MBR and the datapath are implemented in Verilog. Verification has been done with the help of relevant test benches. Every new feature is simulated on ModelSim. Complete reverse engineering is performed for the Instruction Set Architecture (ISA) of MARIE. The reverse engineering allows for understanding the micro-operations as well as the Datapath and control FSM logic.
